Principal CPU Systems Debug Architecture/RTL Engineer

Company: Nutanix
Location: San Diego
Posted on: June 1, 2025

Job Description:

Company:Qualcomm Technologies, Inc.Job Area:Engineering Group, Engineering Group > CPU EngineeringGeneral Summary:We are hiring a talented engineer for CPU System Debug Architecture/RTL engineer targeted for high performance, low power devices. In this role, you will work with chip architects to conceive of the micro-architecture and help with architecture/product definition through early involvement in the product life cycle.Required for this Role:

• MS degree in Computer or Electrical Engineering with 15+ years of CPU RTL or similar experience.
• Thorough knowledge of microprocessor architecture includes expertise in one or more of the following areas: CPU System Debug including ARM Debug Architecture, Micro-architecture Debug techniques including various trace filtering and trigger techniques, Scan dump and mem-dump architectures. Experience with other DFx techniques is a plus - including understanding of Design for test and Design for Debug architecture.
• Knowledge of Verilog and/or VHDL. Experience with simulators and waveform debugging tools.
• Knowledge of logic design principles along with timing and power implications.Preferred qualifications
• MS degree or PhD in Computer or Electrical Engineering.
• Work hand in hand with SoC and CPU architects to close on Debug requirements and enhancements.
• Understanding of low power microarchitecture techniques.
• Understanding high-performance techniques and trade-offs in CPU microarchitecture.
• Experience using a scripting language such as Perl or Python.Roles and ResponsibilitiesAs an Architect/RTL engineer you will own or participate in the following:
• Performance exploration and power optimization opportunities. Explore high performance strategies working with the CPU modeling team.
• Work together with Post-silicon team to enhance debug features to reduce time to debug.
• Microarchitecture development and specification. From early high-level architectural exploration, through micro architectural research and arriving at a detailed specification.
• RTL ownership. Development, assessment and refinement of RTL design to target power, performance, area and timing goals.
• Functional verification support. Help the design verification team execute on the functional verification strategy.
• Performance verification support. Help verify that the RTL design meets the performance goals.
• Design delivery. Work with multi-functional engineering team to implement and validate physical design on the aspects of timing, area, reliability, testability and power.
• Work alongside with Software, Firmware and platform team to make CPU systems features enabled in the products.Minimum Qualifications:--- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 8+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.ORMaster's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 7+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.ORPhD in Electrical Engineering, Computer Engineering, Computer Science, or related field and 6+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
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Keywords: Nutanix, El Centro , Principal CPU Systems Debug Architecture/RTL Engineer, Other , San Diego, California